1. Field of the Invention
The present invention relates in general to an improved FM detecting circuit which uses a phase locked loop (PLL) mode.
2. Description of the Related Art
In general, an FM detecting circuit which uses a PLL mode forms a closed feedback circuit. The closed feedback circuit comprises a phase detector, a low-pass filter, an amplifier and a voltage controlled oscillator.
This circuit is constructed in such a manner that the frequency and phase of input signals are compared by the phase detector, a voltage is generated proportional to an error obtained from the comparison, and then the error voltage is amplified by an amplifier after passing through a low-pass filter. Subsequently, the amplified error voltage is applied to a voltage controlled oscillator which varies the applied voltage frequency to decrease the oscillating frequency and the phase difference of the voltage controlled oscillator
The PLL circuit has been employed to control different circuits including servo motor circuits, FM tuners and local oscillators, each being highly stable over varying frequencies.
A conventional FM detecting circuit 100 which uses a PLL mode will now be described with reference to FIG. 1. A reference voltage unit 1 is provided for applying a reference voltage. A phase detector 2 senses a phase difference between a frequency-modulated signal and a frequency signal. A low-pass filter 3 receives the output signal from phase detector 2, and outputs a detecting signal after passing only low frequency signals therethrough. A voltage controlled oscillator 4 receives the output signal from the low-pass filter 3, and modifies the frequency signal.
Providing that power is applied by a user, phase detector 2 receives an FM signal and an input signal from the voltage controlled oscillator, compares the phases of two signals, and then generates a DC voltage proportional to a phase difference.
Subsequently, the low-pass filter 3 receives a reference voltage from the reference voltage unit 1 and the DC voltage from the phase detector 2, and outputs a detected signal by passing the low frequency signals therethrough.
Next, voltage controlled oscillator 4 receives the output signal from the low-pass filter 3, and generates the oscillating signal to be inputted to phase detector 2.
In such a feedback circuit, the detected signal level is determined based upon the gain of voltage controlled oscillator 4. In general, the gain of voltage controlled oscillator 4 is in inverse proportion to the detected signal level. That is, under the condition that the carrier frequency and the modulation degree are constant, the detected signal level is lowered when the gain of the voltage controlled oscillator 4 is raised, and the level is raised when the gain is lowered.
It is difficult to control the level of the detected signal when employing the illustrated conventional FM detecting circuit in an integrated circuit, because values of a resistance and a capacitor of the voltage controlled oscillator may be varied as a result of production tolerance variations.
More specifically, if a free running frequency of the voltage controlled oscillator falls below a predetermined frequency under the influence of the resistance and the capacitor of the voltage controlled oscillator with the procedure tolerance, the gain of the voltage controlled oscillator will be lower than a predetermined gain, and the detected signal level will be raised above an average level. If a free running frequency of the voltage controlled oscillator exceeds a predetermined frequency, the gain of the voltage controlled oscillator will be higher than the predetermined gain, while the detected signal level will be below the average level.
Accordingly, it is difficult for the illustrated conventional FM detecting circuit using a PLL mode to produce an output signal having an accurate level.